{
  "slug": "crc-burst-error",
  "term": "CRC burst error",
  "aliases": [
    "Error burst"
  ],
  "definition": "A CRC burst error is a bit-inversion pattern whose span extends from its first changed bit through its last in a specified processing order.",
  "note": "Span includes unchanged interior bits, while Hamming weight counts only changes. The distinction matters in the paired 15-bit and 18-bit counterexamples: each spans 33 processing bits. [hesela-crc] A physical disturbance does not define that ordering without the intervening data transformations. [hesela-crc]",
  "status": "shipping",
  "advantages": [],
  "limitations": [],
  "related": [
    "cyclic-redundancy-check",
    "crc32c",
    "hamming-distance"
  ],
  "supersedes": [],
  "supersededBy": [],
  "firstSeen": null,
  "lastSeen": null,
  "citations": [
    {
      "id": "rfc3385",
      "title": "Sheinwald et al. RFC 3385: iSCSI CRC/Checksum Considerations, sections 2-3 and 10 (2002)",
      "url": "https://www.rfc-editor.org/rfc/rfc3385.html",
      "accessed": "2026-10-18"
    },
    {
      "id": "hesela-crc",
      "title": "Hesela: CRC polynomials, constructed error patterns and exact small-code enumeration",
      "url": "https://hesela.com/analyses/crc-polynomials-error-patterns/",
      "accessed": "2026-10-18"
    }
  ],
  "updated": "2026-10-18"
}