{
  "slug": "eadr",
  "term": "Extended Asynchronous DRAM Refresh",
  "aliases": [
    "eADR",
    "enhanced ADR"
  ],
  "definition": "Extended Asynchronous DRAM Refresh is a platform capability that extends persistent-memory power-fail protection to CPU caches.",
  "note": "Intel's third-generation Xeon overview states that supported, detected eADR removes explicit cache-flush requirements but still requires SFENCE and adequate platform stored energy. This is a system capability, not a guarantee inferred solely from a CPU model. [intel-eadr] PMDK's byte persistence granularity still permits ordering barriers; a larger persistence domain is not an application transaction. [pmdk-granularity]",
  "status": "shipping",
  "advantages": [],
  "limitations": [],
  "related": [
    "adr",
    "persistence-domain",
    "persistent-memory",
    "persistence-ordering"
  ],
  "supersedes": [],
  "supersededBy": [],
  "firstSeen": null,
  "lastSeen": null,
  "updated": "2026-10-13",
  "citations": [
    {
      "id": "intel-eadr",
      "title": "Intel. Third Generation Xeon Processor Scalable Family on Two Socket Platforms: eADR.",
      "url": "https://www.intel.com/content/www/us/en/developer/articles/technical/third-generation-xeon-scalable-family-overview.html",
      "accessed": "2026-10-13"
    },
    {
      "id": "pmdk-granularity",
      "title": "PMDK 1.13.1. libpmem2(7), GRANULARITY (pinned source documentation).",
      "url": "https://github.com/pmem/pmdk/blob/1.13.1/doc/libpmem2/libpmem2.7.md",
      "accessed": "2026-10-13"
    },
    {
      "id": "hesela-pmem",
      "title": "Hesela. Persistent memory: DAX is not a durable commit.",
      "url": "https://hesela.com/analyses/pmem-persistence-domains-dax/",
      "accessed": "2026-10-13"
    }
  ]
}