{
  "slug": "nand-page",
  "term": "NAND page",
  "aliases": [
    "flash page"
  ],
  "definition": "A NAND page is a group of data bits addressed together for a page read or program operation within an erase block.",
  "note": "A host sector and an FTL mapping entry need not have the same size as a physical page. In multi-bit NAND, different logical pages can share cells on a wordline. [agrawal2008] [cai2017]",
  "status": "shipping",
  "advantages": [],
  "limitations": [],
  "related": [
    "nand-flash",
    "nand-erase-block",
    "nand-wordline",
    "nand-page-pairing",
    "ftl"
  ],
  "supersedes": [],
  "supersededBy": [],
  "firstSeen": null,
  "lastSeen": null,
  "updated": "2026-10-15",
  "citations": [
    {
      "id": "agrawal2008",
      "title": "Agrawal et al. Design Tradeoffs for SSD Performance. USENIX ATC 2008, section 2 and Table 1.",
      "url": "https://www.usenix.org/legacy/events/usenix08/tech/full_papers/agrawal/agrawal_html/index.html",
      "accessed": "2026-10-15"
    },
    {
      "id": "cai2017",
      "title": "Cai et al. Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives. 2017, sections 2.1 and 2.3.",
      "url": "https://arxiv.org/pdf/1706.08642v3",
      "accessed": "2026-10-15"
    }
  ]
}