{
  "slug": "nvme-persistent-memory-region",
  "term": "NVMe Persistent Memory Region (PMR)",
  "aliases": [
    "NVMe PMR",
    "Persistent Memory Region"
  ],
  "definition": "NVMe Persistent Memory Region is optional device-resident persistent memory accessed through PCIe memory reads and writes.",
  "note": "PMR is separate from host-allocated HMB and controller working-memory CMB. Its backing may be power-protected DRAM or another persistent-memory technology; the interface does not prescribe a medium or application. [faq]\n\nIn NVMe 1.4a, CAP.PMRS reports support. Software enables PMRCTL.EN and waits for PMRSTS.NRDY to clear before access. HSTS is cleared to 000b while PMR is not ready, so a normal health value alone is not a readiness test. Check enablement and NRDY independently. While not ready, writes can complete without changing the region and reads return undefined data. [nvme]\n\nPMRCAP.PMRWBM identifies supported write barriers. While PMR is ready and operating normally, completion of an advertised PMR memory read or PMRSTS-register read establishes persistence of prior PMR writes; a PMRSTS read is a barrier only when that mechanism is supported. Software must check PMRSTS.HSTS and ERR before accepting validity. Restore Error (HSTS = 001b) means new writes remain persistent when successfully completed, but earlier contents may not have been restored correctly; persistence of a new write does not certify recovery of older data. [nvme]\n\nPersisted contents survive power cycles, controller-level resets and disabling the region under the specified operating conditions. PMRMSC configures controller addressing, not a persistence barrier. Putting command data in PMR does not itself write that data to a namespace LBA. [nvme]",
  "status": "unknown",
  "advantages": [
    {
      "text": "The memory interface permits uses beyond a prescribed SSD cache policy.",
      "citationIds": [
        "faq"
      ]
    },
    {
      "text": "SPDK exposes operations to query capabilities, enable and disable PMR, and map its memory.",
      "citationIds": [
        "spdk"
      ]
    }
  ],
  "limitations": [
    {
      "text": "NVMe 1.4a leaves queues and PRP/SGL lists in PMR outside its defined support; CMB queue capabilities cannot be assumed here.",
      "citationIds": [
        "nvme"
      ]
    },
    {
      "text": "A PMR mapping can fail or be unavailable; a software API is not proof of support on a particular SSD.",
      "citationIds": [
        "spdk"
      ]
    }
  ],
  "related": [
    "controller-memory-buffer",
    "hmb",
    "nvme",
    "persistent-memory",
    "pcie-storage"
  ],
  "supersedes": [],
  "supersededBy": [],
  "firstSeen": null,
  "lastSeen": null,
  "citations": [
    {
      "id": "nvme",
      "title": "NVM Express 1.4a (9 March 2020), sections 3.1.18-3.1.23 and 4.8. Copyright 2007-2020 NVM Express, Inc.",
      "url": "https://www.nvmexpress.org/wp-content/uploads/NVM-Express-1_4a-2020.03.09-Ratified.pdf",
      "accessed": "2026-10-28"
    },
    {
      "id": "faq",
      "title": "NVM Express: What is Persistent Memory Region?",
      "url": "https://nvmexpress.org/faq-items/what-is-persistent-memory-region/",
      "accessed": "2026-10-28"
    },
    {
      "id": "spdk",
      "title": "SPDK NVMe API: PMR capabilities, enable, disable and map operations",
      "url": "https://spdk.io/doc/nvme_8h.html",
      "accessed": "2026-10-28"
    },
    {
      "id": "hesela-hmb",
      "title": "Hesela: Host Memory Buffer and neighboring memory concepts",
      "url": "https://hesela.com/tech/hmb/",
      "accessed": "2026-10-28"
    },
    {
      "id": "hesela-health",
      "title": "Hesela: NVMe health-log coverage and PMR warnings",
      "url": "https://hesela.com/analyses/nvme-health-log-coverage/",
      "accessed": "2026-10-28"
    }
  ],
  "updated": "2026-11-04",
  "provenance": [
    "Register and reset semantics are scoped to NVMe 1.4a; SPDK documentation supplies an API example, not a device conformance test.",
    "Hardware availability is not assessed, so status is unknown. No power-cut or performance experiment is reported.",
    "The qualified alias NVMe PMR avoids conflating this concept with perpendicular magnetic recording at the existing pmr slug."
  ]
}