{
  "slug": "nvme-phase-tag",
  "term": "NVMe Phase Tag",
  "aliases": [
    "NVMe phase bit"
  ],
  "definition": "The NVMe Phase Tag is a one-bit marker used in memory-based completion queues, including PCIe, to distinguish new entries from old contents of a reused slot.",
  "note": "Scope: The expected phase alternates on each traversal of the completion ring. The bit is reserved in NVMe over Fabrics; it is not a transport-independent completion mechanism. [base-2-0d]\n\nProcessing: Linux v6.12 checks the expected bit, uses a DMA read barrier before processing the entry, and flips its expected phase when the head wraps. [linux]\n\nMeaning: Freshness is separate from command status. A matching phase can accompany an error; it is not proof of a durable write. [base-2-0d]",
  "related": [
    "nvme",
    "nvme-completion-queue",
    "nvme-command-identifier",
    "io-completion-polling"
  ],
  "citations": [
    {
      "id": "base-2-0d",
      "title": "NVM Express Base 2.0d, sections 3.3.1.2, 3.3.2.1.1-2 and 3.3.3; copyright 2008-2024 NVM Express, Inc., all rights reserved",
      "url": "https://nvmexpress.org/wp-content/uploads/NVM-Express-Base-Specification-2.0d-2024.01.11-Ratified.pdf",
      "accessed": "2026-10-23"
    },
    {
      "id": "linux",
      "title": "Linux v6.12: NVMe PCIe completion phase, DMA barrier and ring wrap",
      "url": "https://github.com/torvalds/linux/blob/v6.12/drivers/nvme/host/pci.c",
      "accessed": "2026-10-23"
    }
  ],
  "status": "shipping",
  "advantages": [],
  "limitations": [],
  "supersedes": [],
  "supersededBy": [],
  "firstSeen": null,
  "lastSeen": null,
  "updated": "2026-10-23",
  "provenance": [
    "Versioned sources explain protocol and implementation behavior; no hardware experiment or performance claim."
  ]
}