{
  "status": "shipping",
  "advantages": [],
  "limitations": [
    {
      "text": "The chip generation and internal programming path constrain the result; controller ECC does not automatically cover every internal reread.",
      "citationIds": [
        "cai"
      ]
    }
  ],
  "supersedes": [],
  "supersededBy": [],
  "firstSeen": null,
  "lastSeen": null,
  "slug": "program-interference",
  "term": "NAND program interference",
  "aliases": [
    "Cell-to-cell program interference"
  ],
  "definition": "NAND program interference is an unintended shift in a cell's threshold voltage caused by programming neighboring cells.",
  "note": "This differs from page pairing (shared cells), read disturb (read-induced effects) and retention loss (time-dependent degradation). In the HPCA 2017 experiments, capacitive coupling affected partially programmed planar MLC cells.",
  "related": [
    "nand-page-pairing",
    "mlc",
    "read-disturb",
    "data-retention"
  ],
  "citations": [
    {
      "id": "cai",
      "title": "Cai, Ghose, Luo, Mai, Mutlu and Haratsch. Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques. HPCA 2017, sections 2-4 and 6. DOI: 10.1109/HPCA.2017.61",
      "url": "https://research.ece.cmu.edu/safari/pubs/flash-memory-programming-vulnerabilities_hpca17.pdf",
      "accessed": "2026-10-11"
    },
    {
      "id": "hesela-pairing",
      "title": "Hesela: NAND paired pages and durability boundaries",
      "url": "https://hesela.com/analyses/nand-paired-pages-durability/",
      "accessed": "2026-10-11"
    }
  ]
}