Dataset · SSD failures · SYSTOR 2016
NAND erase blocks grew from 64 pages to as many as 576, and in one simulation write amplification rose from 2.1 to 5.1 with block size
NAND is erased in whole blocks: 256 KB (64 pages) with a 1.5 ms erase in a 2008 part (Agrawal et al.), 128 to 192 pages per block in 2D and up to 576 in 3D NAND (Liu et al.), where simulated write amplification rose from 2.1 to 5.1 with block size. Each extra bit per cell cuts program/erase lifetime 10 to 20 times (Grupp et al.).
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The CSV transcribes figures printed in Narayanan et al. (SYSTOR 2016) and two cross-check rows from NetApp (FAST 2020) and Backblaze (2016). It does not read chart values. AFR is the share of devices with failures divided by device years. A failure here is a fail-stop that takes a server down.
Limits
- The sources use different parts and years; the 2008 times and endurance are not current figures.
- The write amplification result is a simulation with a block-level FTL; page-level FTLs do not show it.
- Partial erase is a proposal that needs chip support.
- Pages-per-block ranges vary by vendor and generation.
- The sources give no 3D NAND erase times beyond saying they are longer.
Table
| Measure | Value low | Value high | Unit | Scope | Note | Citation |
|---|---|---|---|---|---|---|
| Page size in the 2008 example part | not stated | 4 | KB | 2 GB die in a 2 x 2 GB package | Read and program work on one page. | agrawal-atc08-pdf |
| Erase block size in the 2008 example part | not stated | 256 | KB | Same part | 64 pages of 4 KB; pages must be written in order within a block. | agrawal-atc08-pdf |
| Time to read a page into the register | not stated | 25 | microseconds | Same part | Moving it over the data bus adds 100 microseconds. | agrawal-atc08-pdf |
| Time to program a page from the register | not stated | 200 | microseconds | Same part | agrawal-atc08-pdf | |
| Time to erase a block | not stated | 1.5 | milliseconds | Same part | Erase is far slower than a read or a program. | agrawal-atc08-pdf |
| Erase cycles a block endures | not stated | 100000 | program/erase cycles | Current-generation flash in 2008 | Printed as 100K. | agrawal-atc08-pdf |
| Average latency with 4 KB logical pages, TPC-C trace | not stated | 200 | microseconds | Simulated SSD, eight packages | Logical page size equal to the page. | agrawal-atc08-pdf |
| Average latency with 256 KB logical pages, TPC-C trace | not stated | 20 | milliseconds (lower bound) | Same simulation, logical page equal to the block | Printed as over 20 ms; every smaller write needs a read-modify-write. | agrawal-atc08-pdf |
| Pages per block in 2D NAND | 128 | 192 | pages | Typical planar flash | Page size varies from 2 KB to 32 KB. | liu-fast18-pdf |
| Pages per block in 3D NAND | not stated | 576 | pages (upper end) | Vertical-channel 3D NAND | Printed as as high as 576; a 3D block holds at least 3 times the pages of a 2D block. | liu-fast18-pdf |
| Write amplification with 72-page blocks | not stated | 2.1 | ratio of flash writes to host writes | Block-level FTL, write-intensive traces, same capacity | Average over the high write-intensive workloads; page-level FTLs did not show this trend. | liu-fast18-pdf |
| Write amplification with 576-page blocks | not stated | 5.1 | ratio of flash writes to host writes | Same simulation | A simulation, not a measurement of a drive. | liu-fast18-pdf |
| Write latency cut from partial erase | 44.3 | 47.9 | percent | Block-level FTL (44.3%) and hybrid FTL (47.9%) | Needs a changed erase command and chip support, so it is a proposal. | liu-fast18-pdf |
| Page size in a modern SSD | 8 | 16 | KB | NAND flash memory in SSDs | Each block typically holds hundreds of pages; controllers group same-numbered blocks into superblocks. | cai-procieee17-pdf |
| Write latency increase per extra bit stored per cell | not stated | 4 | times | Flash chips measured by the authors | Density gains shrink: 2x, 1.5x, and 1.3x. | grupp-fast12-pdf |
| Program/erase lifetime loss per extra bit stored per cell | 10 | 20 | times lower | Same chips | Printed as 10x to 20x. | grupp-fast12-pdf |
Columns
- measure
- The quantity as the source names it.
- value_low
- Lower end of a printed range. Empty when the source prints a single value.
- value_high
- Single printed value, or the upper end of a range. For 'over' or 'up to' it is the stated bound.
- unit
- Unit of the value columns: KB, microseconds, milliseconds, cycles, pages, ratio, percent, or times.
- scope
- Population and window the value applies to.
- note
- What the value is not, or the source wording behind it.
- citation_id
- Id of the opened source in the citations list.
License
Small derived table of figures printed in Agrawal et al. (ATC 2008), Liu et al. (FAST 2018), Grupp et al. (FAST 2012), and Cai et al. (Proceedings of the IEEE 2017), with credit. Not a Creative Commons license. The papers remain with their authors or publishers. This file is not a copy of the papers and not the data.
Sources
- Design Tradeoffs for SSD Performance, Agrawal, Prabhakaran, Wobber, Davis, Manasse, and Panigrahy, USENIX ATC 2008 (USENIX PDF, section 2 and table 1)
- PEN: Design and Evaluation of Partial-Erase for 3D NAND-Based High Density SSDs, Liu, Kotra, et al., USENIX FAST 2018 (USENIX PDF, sections 2 and 6)
- The Bleak Future of NAND Flash Memory, Grupp, Davis, and Swanson, USENIX FAST 2012 (USENIX PDF, introduction)
- Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives, Cai, Ghose, Haratsch, Luo, and Mutlu, Proceedings of the IEEE, September 2017 (arXiv 1706.08642, section 2)