nand-erase-suspension · research · also Erase suspend

NAND erase suspension

NAND erase suspension interrupts an ongoing block erase to permit other supported operations before the erase resumes.

Suspend/resume requires NAND and controller support; it is not equivalent to merely prioritizing queued reads. Wu and He evaluate a proposed program/erase suspension mechanism in simulation. [1]

The practical policies studied by Kim et al. differ in when an erase step is interrupted and whether its progress is retained. Supported mechanisms and scheduling policy must be identified separately. [2]

Relations

related

NAND erase block, Preemptible garbage collection, Garbage collection (flash)

Limitations

• Suspension is not erase completion, a durability barrier or proof of an application's latency bound. [1, 2]

Citations

1. Guanying Wu and Xubin He. Reducing SSD Read Latency via NAND Flash Program and Erase Suspension. FAST 2012, pp. 117-123; sections 3-5. (accessed 2026-10-25)
2. Shine Kim et al. Practical Erase Suspension for Modern Low-latency SSDs. USENIX ATC 2019, pp. 813-820; sections 2-3, Figure 3 and Tables 1-2. (accessed 2026-10-25)

Further reading

3. Hesela: SSD fairness, NAND suspension and write progress (accessed 2026-10-25)

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