Strict persistency
Strict persistency couples persistent memory order to the underlying volatile memory order.
Strictness is relative to the memory consistency model, not a synonym for sequential consistency. Under the paper's SC case, a thread's persistent stores follow its program order, while unordered events in different threads may remain concurrent. Buffered strict persistency can let execution run ahead of durable state; ordering alone does not imply immediate completion. [1]
Relations
Citations
- Pelley, Chen and Wenisch. Memory Persistency. ISCA 2014, pp. 265-276; sections 4-5 and 7-8, Table 1.
Further reading
- Han and Kimura. Durable Queue Implementations Built on a Formally Defined Strand Persistency Model. JIP 29 (2021), pp. 823-838, sections 2-3.
- Steven Pelley, Peter M. Chen and Thomas F. Wenisch. RETROSPECTIVE: Memory Persistency. ISCA retrospective, 2023; sections I-II.
- Hesela. Persistent memory: DAX is not a durable commit.