eeprom-emulation · shipping · also Flash-based EEPROM emulation

EEPROM emulation

EEPROM emulation is a software technique that provides updatable nonvolatile variables over flash memory while managing its programming, erase and recovery constraints.

Related Observatory article: EEPROM emulation on hesela.com

This is a storage-management scheme, not a separate memory-cell technology. ST's AN4894 implementation appends updated variable records, copies current valid records to another flash-page set when space runs out, then erases the old set. It requires at least two pages; a set can contain several pages. [1]

Usable variable capacity is smaller than the allocated flash space because records, page state and reclamation need room. Page transfers add work to some updates; on the documented STM32 implementation, programming or erasing the same bank can stall code execution. [1] [2]

Hardware ECC does not reliably detect interrupted flash programming or erasure on the devices discussed in AN4894. The driver therefore uses a per-record CRC and recovery logic; ECC alone is not an interrupted-update guarantee. [3]

AN4894 recovers the latest valid variable value, which may be the value preceding an interrupted update. If power loss or reset interrupts the first write to that virtual address, the driver considers it to have no stored value. The application must handle that missing-value case at startup. [3]

Recovery, CRC checks and wear management belong to the chosen implementation. Review its initialization and failure handling together with the MCU's flash specification; the label EEPROM emulation does not establish atomic application-level updates.

Relations

related
EEPROM, NOR flash, Wear leveling, Garbage collection (flash), Program/erase cycle

Advantages

  • Can use existing embedded flash instead of adding a standalone EEPROM component. [1]

Limitations

  • Update cost depends on page reclamation and the device's read-while-write capabilities. [2]

Citations

  1. STMicroelectronics. AN4894 Rev 12 (July 2026), Implementing EEPROM emulation: page sets, record updates and reclamation. Official HTML convenience edition. (accessed 2026-10-20)
  2. STMicroelectronics. AN4894 Rev 12, Real-time considerations: same-bank execution stalls and read-while-write alternatives. (accessed 2026-10-20)
  3. STMicroelectronics. AN4894 Rev 12, Data recovery: interrupted first writes and recovery of previous valid variable values. (accessed 2026-10-20)
Sources & caveats
  • ST's page states and recovery mechanisms are an implementation example, not universal requirements for every emulation design.
  • AN4894 was checked in ST's official HTML convenience edition; the vendor identifies its PDF as the reference document. No power-failure validation was performed.

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Hesela team. EEPROM emulation. Hesela. 2026-10-20. https://hesela.dev/terms/eeprom-emulation/