nand-target · shipping · also ONFI target

NAND target

An ONFI NAND target groups one or more logical units that share a chip-enable signal within a NAND package.

Related Observatory article: NAND target on hesela.com

A target is an interface-selection boundary, not a synonym for a host-visible filesystem volume, block-device volume or SSD. Its logical units can contain multiple planes, each grouping erase blocks. [1]

Software keeps these levels separate: Linux records target count, LUNs per target and planes per LUN as distinct geometry fields. Read the part's organization and driver conventions before translating a package or die count into a target count. [2]

CE_n pin reduction changes the host-side count. ONFI 4.0 permits several NAND targets to share one host chip-enable signal, with Volume Select choosing the initialized target address. This protocol Volume is not a host filesystem volume; a host CE_n count alone need not equal the NAND target count. [1]

Relations

related
NAND logical unit, NAND plane, NAND flash, NAND channel, NAND die stacking

Citations

  1. ONFI 4.0, sections 1.4.1, 2.20 and 3: NAND hierarchy and CE_n pin reduction (accessed 2026-10-23)
  2. Linux v6.12, include/linux/mtd/nand.h: nand_memory_organization, nand_pos and nanddev_target_size (accessed 2026-10-20)
Sources & caveats
  • ONFI terminology is scoped to the cited editions; component geometry and supported command sequences must be checked for the selected device.

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Hesela team. NAND target. Hesela. 2026-10-23. https://hesela.dev/terms/nand-target/