hesela.devNVMe non-operational power state
An NVMe non-operational power state suspends I/O command processing until the controller returns to an operational state.
Controller state: Admin-command and property activity can remain possible. An incoming I/O command restores the most recent operational state even with APST disabled. This is not a powered-off device. [1]
Latency fields: ENLAT and EXLAT report maximum entry and exit latencies in microseconds. Zero means not reported, not zero delay. Relative read/write latency fields are ranks, not microsecond durations. These descriptors do not measure application response time. [2]
Power removal: PCI D3cold removes the main supply; returning from it involves power-on reset behavior. That device-level event is distinct from an NVMe idle-state transition. [3]
Relations
Citations
- NVM Express Base Specification 2.0e: sections 5.27.1.9 and 8.15, Figure 281
- libnvme v1.15: nvme_id_psd power-state descriptors
- Linux kernel documentation: PCI power-management states
Sources & caveats
- NVMe semantics use Base 2.0e and libnvme v1.15 field documentation; no physical-device wake latency was measured.