nvme-autonomous-power-state-transition · shipping · also APST, NVMe APST

NVMe Autonomous Power State Transition

NVMe Autonomous Power State Transition lets a configured controller enter non-operational power states after specified idle intervals.

Related Observatory article: NVMe Autonomous Power State Transition on hesela.com

Idle policy: APST uses Feature Identifier 0Ch. The idle threshold ITPT is in milliseconds; zero disables the transition from that state. Its target ITPS must be non-operational. Idle means no outstanding commands in any I/O Submission Queue. [1]

Host policy: Linux v6.12 filters EXLAT against ps_max_latency_us; explicit-timeout mode also screens ENLAT + EXLAT against separate tolerances. Heuristic mode uses that sum to choose the idle delay. Capabilities and quirks also matter. [2]

Separate controls: PCIe ASPM governs the link, while HCTM responds to temperature. [1] The documented StorNVMe Modern Standby policy excludes devices with APST enabled; idle power management is not universally APST. [3]

Relations

related
NVMe non-operational power state, PCIe Active State Power Management, NVMe Host Controlled Thermal Management, SSD thermal throttling

Citations

  1. NVM Express Base Specification 2.0e: sections 5.27.1.9 and 8.15, including HCTM (accessed 2026-10-21)
  2. Linux v6.12: nvme_configure_apst and power-state latency policy (accessed 2026-10-21)
  3. Microsoft Learn: StorNVMe power management, idle states and PCIe ASPM (accessed 2026-10-21)
Sources & caveats
  • Source review of NVMe Base 2.0e and pinned Linux v6.12 code; neither is claimed to be the latest revision.
  • Microsoft documentation describes StorNVMe behavior, not every Windows driver or platform. [3]

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Hesela team. NVMe Autonomous Power State Transition. Hesela. 2026-10-21. https://hesela.dev/terms/nvme-autonomous-power-state-transition/