hesela.devNVMe Persistent Memory Region (PMR)
NVMe Persistent Memory Region is optional device-resident persistent memory accessed through PCIe memory reads and writes.
PMR is separate from host-allocated HMB and controller working-memory CMB. Its backing may be power-protected DRAM or another persistent-memory technology; the interface does not prescribe a medium or application. [2]
In NVMe 1.4a, CAP.PMRS reports support. Software enables PMRCTL.EN and waits for PMRSTS.NRDY to clear before access. HSTS is cleared to 000b while PMR is not ready, so a normal health value alone is not a readiness test. Check enablement and NRDY independently. While not ready, writes can complete without changing the region and reads return undefined data. [1]
PMRCAP.PMRWBM identifies supported write barriers. While PMR is ready and operating normally, completion of an advertised PMR memory read or PMRSTS-register read establishes persistence of prior PMR writes; a PMRSTS read is a barrier only when that mechanism is supported. Software must check PMRSTS.HSTS and ERR before accepting validity. Restore Error (HSTS = 001b) means new writes remain persistent when successfully completed, but earlier contents may not have been restored correctly; persistence of a new write does not certify recovery of older data. [1]
Persisted contents survive power cycles, controller-level resets and disabling the region under the specified operating conditions. PMRMSC configures controller addressing, not a persistence barrier. Putting command data in PMR does not itself write that data to a namespace LBA. [1]
Relations
- related
- Controller Memory Buffer (CMB), Host memory buffer (HMB), NVMe, Persistent memory, PCIe storage attachment
Advantages
- The memory interface permits uses beyond a prescribed SSD cache policy. [2]
- SPDK exposes operations to query capabilities, enable and disable PMR, and map its memory. [3]
Limitations
- NVMe 1.4a leaves queues and PRP/SGL lists in PMR outside its defined support; CMB queue capabilities cannot be assumed here. [1]
- A PMR mapping can fail or be unavailable; a software API is not proof of support on a particular SSD. [3]
Citations
- NVM Express 1.4a (9 March 2020), sections 3.1.18-3.1.23 and 4.8. Copyright 2007-2020 NVM Express, Inc.
- NVM Express: What is Persistent Memory Region?
- SPDK NVMe API: PMR capabilities, enable, disable and map operations
Further reading
- Hesela: Host Memory Buffer and neighboring memory concepts
- Hesela: NVMe health-log coverage and PMR warnings
Sources & caveats
- Register and reset semantics are scoped to NVMe 1.4a; SPDK documentation supplies an API example, not a device conformance test.
- Hardware availability is not assessed, so status is unknown. No power-cut or performance experiment is reported.
- The qualified alias NVMe PMR avoids conflating this concept with perpendicular magnetic recording at the existing pmr slug.